Opportunities and Challenges of Digital Signal Processing in Deeply Technology-Scaled Transceivers

The ever improving cost advantages and processing capabilities of the technology have been happening according to the so-called Moore’s Law. Although digital circuits can significantly benefit from the aggressive scaling, it is very controversial for analog circuit. However, analog circuit still has to follow the scaling trend because a single chip integration offers key commercial advantages. To optimally achieve the best performance/power/cost tradeoff with deeply scaled technology nodes, there is a clear trend and paradigm shift towards digital intensive and digitally assisted transceivers. Successes of such transceivers have been proven for individual transceiver components and narrow band systems. When targeting emerging communication standards, higher carrier frequencies, further technology scaling and reconfigurable radios, required signal processing design and implementation are orders of magnitudes more challenging but potential gains are promising. Based on a variety of transceiver designs implementing emerging architectures for different sub-6 GHz and 60 GHz communication systems, we will highlight the key challenges and opportunities experienced using 40 nm and 28 nm technology nodes. Chunshu Li · Min Li · Khaled Khalaf · Andre Bourdoux · Mark Ingels · Piet Wambacq · Jan Craninckx · Liesbet Van Der Perre · Sofie Pollin Deparment of Circuits and Systems, IMEC Kapeldreef-75, Leuven 3001, Belgium E-mail: [email protected] Chunshu Li · Marian Verhelst · Liesbet Van Der Perre · Sofie Pollin Deparment of Electrical Engineering, K.U.Levuen Leuven 3000, Belgium Khaled Khalaf · Piet Wambacq Deparment of Electronics and Informatics, Vrije Universiteit Brussels, Brussels 1000, Belgium